Call for Papers

4th IEEE International Conference on Rebooting Computing
Part of IEEE Rebooting Computing Week
6-8 November 2019
San Francisco Bay Area, California

The 4th IEEE International Conference on Rebooting Computing (ICRC 2019) will be held 6-8 November in the San Francisco Bay Area, California. ICRC is a premier venue for novel computing approaches. ICRC grew out of the IEEE Rebooting Computing Initiative (RCI), which was founded in 2012 to catalyze rethinking of the computer at all levels of the technology stack. The Rebooting Computing Committee represents thirteen IEEE Societies and Councils, and the membership in the Rebooting Computing Technical Community is approaching three thousand. For more information on the RCI please visit the Rebooting Computing Portal (

Now in its 4th year, the IEEE International Conference on Rebooting Computing is the premier venue for forward looking computing, including algorithms and languages, system software, system and network architectures, new devices and circuits, and applications of new materials and physics. This is an interdisciplinary conference that has participation from a broad technical community, with emphasis on all aspects of the computing stack. The broad scope of ICRC extends to many areas of interest, including novel device physics and materials for post-Moore, beyond CMOS, and non-von Neumann computing paradigms.

Topics of interest
Future computing approaches, including neuromorphic, brain-inspired computing, approximate and probabilistic, analog computing; computing based on novel device physics and materials (e.g., spin-based electronics, nonlinear dynamics and chaos); energy-efficient computing including reversible, adiabatic, and ballistic computing, superconductor and cryogenic computing; quantum computing; optical computing; biological and biochemical computing; Non-von Neumann computer architectures (e.g., in-memory processing, memory-based computing, cellular automata, or cellular neural networks).

Future computing design aspects, including extending Moore’s law and augmenting CMOS; error-tolerant logic and circuits; future of design automation. post-CMOS, 3D, heterogeneous integration and packaging; future impact on performance, power, scalability, reliability, supportability

Future Software and Applications, including beyond von Neumann system software issues (operating systems, compilers, security, and resource management); future computing programming paradigms and languages; applications suitable for and driving next generation computing (e.g., machine learning, deep learning.)

Future computing use cases and prototypes, including ethics in design, implementation, and use; new technologies impacting the International Roadmap for Devices and Systems (IRDS); cybersecurity in future computing systems.


Organizing Committee

  • General co-Chairs: Cullen Bash (Hewlett Packard Enterprise) and Vivek Sarkar (Georgia Institute of Technology)
  • Program co-Chairs: Jim Ang (PNNL) and Paolo Faraboschi (Hewlett Packard Enterprise)
  • Full committee list:

Important dates

  • Paper abstract submissions due: 29 April 2019 (11:00 pm EDT)
  • Paper submissions due: 6 May 2019 (11:00 pm EDT)
  • Author notification of acceptance: 7 August 2019
  • Final copies of papers due: 6 September 2019

Authors’ guidelines:
Paper submission link: